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1/12 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. aie adaptive image enhancer series real time video processor ic BU1574GUW description BU1574GUW is aie : adaptive image enhancer (image processing technology by rohm?s hardware). features 1) compatible with image data from qcif size (176 ? 144) up to wvga+ size (864 ? 480). 2) compatible with i/o data formats of itu- r bt.656-4 or ycbcr with synchronizing signals. 3) multiple operation modes: image enhance, through and sleep. 4) registers can be set up through the 2-wire serial interface (i 2 c). 5) pwm output for image adjustment lcd backlight control. 6) built-in edge-enhancement and gamma filters. applications car camera, car display, car navigation sy stem, mobile phone, and portable dvd etc. absolute maximum ratings parameter symbol rating unit power supply voltage 1 vddio -0.3 +4.2 v power supply voltage 2 vdd -0.3 +2.1 v input voltage vin -0.3 vddio+0.3 v storage temperature range tstg -40 +125 power dissipation pd 310 *1 ,570 *2 mw *1 ic only. in the case exceeding 25 c, 3.1 mw should be reduced per 1 c. *2 when mounted on a glass epoxy board of 70 x 70 x 1.6 mm. if exceeding 25 c, 5.7 mw should be reduced per 1 c. * has not been designed to withstand radiation. * operation is not guaranteed. operating conditions parameter symbol rating unit power supply voltage 1 (io) vddio 2.70 3.60(typ:3.00) v power supply voltage 2 (core) vdd 1.40 1.60(typ:1.50) v input voltage range vin-vddio 0 vddio v operating temperatur e range topr -40 +85 * supply the power source in order of vdd ? vddio. no.09060eat04
technical note 2/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. electrical characteristics parameter symbol limits unit conditions min typ max input frequency f in - - 36.0 mhz camcki (duty45% 55%) operating current consumption idd1 - 24 - ma at enhance mode setting (36 mhz). static current consumption iddst - - 30 ua at sleep mode setting input terminal= gnd setting input "h" current iih -10 - 10 ua vih=vddio input "l" current iil -10 - 10 ua vil=gnd input "h" voltage 1 vih1 vddio x0.8 - vddio +0.3 v normal input (including the input mode of i/o terminal) input "l" voltage 1 vil1 -0.3 - vddio x0.2 v normal input (including the input mode of i/o terminal) input "h" voltage 2 vih2 vddio x0.85 - vddio +0.3 v hysteresis input (resetb, camcki, sda, sdc, i2cdev0) input "l" voltage 2 vil2 -0.3 - vddio x0.15 v hysteresis input (resetb, camcki, sda, sdc, i2cdev0) hysteresis voltage width vhys - 0.7 - v hysteresis input (resetb, camcki, sda, sdc, i2cdev0) output "h" voltage voh vddio -0.4 - vddio v ioh = -1.0 ma (dc) (including the output mode of i/o terminal) output "l" voltage vol 0.0 - 0.4 v iol = 1.0 ma (dc) (including the output mode of i/o terminal) (unless otherwise specified; vdd = 1.50 v, vddio = 3.00 v, gnd = 0.0 v, ta = 25 , fin = 36.0 mhz) terminal layout fig.1 terminal layout (bottom view) 17 reservei2 18 reservei3 22 reservei7 24 reservei9 27 vddio 29 gnd 31 msel0 33 msel2 15 reservei0 16 reservei1 20 reservei5 21 reservei6 25 reservei10 30 vdd 32 msel1 34 pwmo 13 camdi6 14 camdi7 19 reservei4 23 reservei8 26 reservei11 35 reserveo11 36 reserveo10 38 reserveo8 11 camdi4 9 camdi2 10 camdi3 12 camdi5 28 camcki 39 reserveo7 37 reserveo9 40 reserveo6 8 camdi1 5 sdc 7 camdi0 60 resetb 44 reserveo2 42 reserveo4 41 reserveo5 43 reserveo3 6 i2cdev0 4 sda 3 camhsi 58 camhso 55 camdo0 51 camdo4 46 reserveo0 45 reserveo1 64 vdd 62 camcko 57 reserveo12 53 camdo2 52 camdo3 48 camdo7 47 gnd 1 camvsi 63 gnd 61 vddio 59 camvso 56 i2cdev6b 54 camdo1 50 camdo5 49 camdo6 a 1 2 3 4 5 6 7 8 b c d e f h g
technical note 3/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. terminal functions pin no. pin name in/out active level init descriptions in/output type 1 camvsi in * - vertical timing input c *1 2 n.c. *2 - - - - - 3 camhsi in * - horizontal timing input c *1 4 sda in/out data in in/output serial data f 5 sdc in clk - in/out put serial clock d *1 6 i2cdev0 in * - i2c device address setting d *1 7 camdi0 in data - data input: bit 0 g *1 8 camdi1 in data - data input: bit 1 g *1 9 camdi2 in data - data input: bit 2 g *1 10 camdi3 in data - data input: bit 3 g *1 11 camdi4 in data - data input: bit 4 g *1 12 camdi5 in data - data input: bit 5 g *1 13 camdi6 in data - data input: bit 6 g *1 14 camdi7 in data - data input: bit 7 g *1 15 reservei0 *3 in * - reserve c *1 16 reservei1 *3 in * - reserve c *1 17 reservei2 *3 in * - reserve c *1 18 reservei3 *3 in * - reserve c *1 19 reservei4 *3 in * - reserve c *1 20 reservei5 *3 in * - reserve c *1 21 reservei6 *3 in * - reserve c *1 22 reservei7 *3 in * - reserve c *1 23 reservei8 *3 in * - reserve c *1 24 reservei9 *3 in * - reserve c *1 25 reservei10 *3 in * - reserve c *1 26 reservei11 *3 in * - reserve c *1 27 vddio - pwr - digital io power source - 28 camcki in clk - clock input d *1 29 gnd - gnd - common ground - 30 vdd - pwr - core power source - 31 msel0 *3 in * - mode select 0 a 32 msel1 *3 in * - mode select 1 a *change by setup by the register is possible for the "*" display in the column of an active level. moreover, init is a pin stat e under reset. *1 : it suspends during reset (initial state) *2 : please connect with gnd *3 : please connect with gnd.
technical note 4/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. pin no. pin name in/out active level init descriptions in/output type 33 msel2 *4 in * - mode select 2 a 34 pwmo out * low pwm output for lcd backlight e 35 reserveo11 *5 out * low reserve e 36 reserveo10 *5 out * low reserve e 37 reserveo9 *5 out * low reserve e 38 reserveo8 *5 out * low reserve e 39 reserveo7 *5 out * low reserve e 40 reserveo6 *5 out * low reserve e 41 reserveo5 *5 out * low reserve e 42 reserveo4 *5 out * low reserve e 43 reserveo3 *5 out * low reserve e 44 reserveo2 *5 out * low reserve e 45 reserveo1 *5 out * low reserve e 46 reserveo0 *5 out * low reserve e 47 gnd - gnd - common ground - 48 camdo7 out data low data output: bit 7 e 49 camdo6 out data low data output: bit 6 e 50 camdo5 out data low data output: bit 5 e 51 camdo4 out data low data output: bit 4 e 52 camdo3 out data low data output: bit 3 e 53 camdo2 out data low data output: bit 2 e 54 camdo1 out data low data output: bit 1 e 55 camdo0 out data low data output: bit 0 e 56 i2cdev6b *3 in * - reserve a 57 reserveo12 *5 out * high reserve e 58 camhso out * low horizontal timing output signal e 59 camvso out * low vertical timing output signal e 60 resetb in low - system reset signal b 61 vddio - pwr - digital io power source - 62 camcko out clk low clock output e 63 gnd - gnd - common ground - 64 vdd - pwr - core power source - *change by setup by the register is possible for the "*" display in the column of an active level. moreover, init is a pin stat e under reset. *3 : please connect with gnd *4 : please connect with vddio *5 : leave open
technical note 5/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. i/o pins equivalent circuit diagrams type equivalent circuit structure type equivalent circuit structure a input pin b input pin with the hysteresis function c input pin with the suspend function d input pin with the hysteresis and suspend functions e output-pin f in/output pin with the hysteresis function g in/output pin with the suspend function fig.2 i/o pins equivalent circuit diagrams vddio vddio gnd to internal gnd vddio gnd to internal internal signal gnd vddio vddio gnd internal signal vddio gnd to internal internal signal vddio gnd gnd internal signal vddio to internal vddio gnd vddio gnd internal signal internal signal internal signal internal signal gnd to internal vddio internal signal vddio vddio internal signal internal signal gnd gnd
technical note 6/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. block diagram camdi[17:0] color correction brightness distinction image enhance register i2c interface timing generator sd a sdc camvsi camhsi camcki msel0/1/2 resetb camdo[17:0] camvso camhso camcko pwmo edge enhancement gamma control pwm control generation fig.3 block diagram functional descriptions 1. brightness distinction luminance of the input image is analyzed, and collection coefficient value is calculated. calculated collection coefficient value is kept until the next frame is input, and it is reflected on the image enha ncement part and the color collection part when the next frame is processed. 2. image enhance the correction operation is done to the luminance element of the input image based on the correction coefficient value from the luminance distinction part. it puts the chroma element from the color co rrection together, and outputs along output format. it is possible to change correcti on strength of the output image. 3. color correction the correction operation is done to the chroma element of t he input image based on the correction coefficient value from the luminance distinction part. color correction strength can be changed. 4. edge enhancement the edge emphasis filter is built into. the image is correc ted to sharp image quality by emphasizing the outline. strength of the edge emphasis filter can be adjusted. 5. gamma control gamma control can be given to the luminance element. a line form is interpolated with a setup point of the gamma curve between the setup point nine points, and output value is calculated from that curve. 6. pwm control generation the pwm signal for the lcd backlight control can be output. there is a setup of a manual by the register in the duty control of the pwm signal, and an auto-se tup to be controlled automatically by BU1574GUW. as for the auto-setup, duty is calculated from the luminance info rmation of the input image every frame. 7. register the image correction parameter, the image size, and the format are set from the register. the data of the register can be written by the i 2 c interface, and be read.
technical note 7/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. 8. data input format 8.1 itu-r bt.656 input format 8.1.1 horizontal direction synchronization timing camcki camdi0 -camdi7 1st 2nd 3rd 4th cb0 y0 cr0 y1 cb359 y718 cr359 y719 1st 2nd 3rd 4th 1st 2nd 3rd 4th sav eav sav valid data section 720pixel y: 720 data cb,cr: 360 data 1440 clocks [ntsc] 1716 clocks / [pal] 1728 clocks fig.4 itu-r bt.656 input format (horizontal direction) 8.1.2 vertical direction synchronization timing field 1 field 2 v bit f bit v bit f bit h bit h bit 52452512345 19202122 262 263 264 265 266 267 268 282 283 284 285 fig.5 itu-r bt.656 input format for ntsc (vertical direction) field 1 field 2 f bit h bit v bit f bit h bit v bit 622 623 624 625 1 2 3 22 23 24 25 309 310 311 312 313 314 315 335 336 337 338 fig.6 itu-r bt.656 input format for pal (vertical direction, bottom view)
technical note 8/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. camhsi camvsi camdio -camdi7 ysize aie_ysize line original image aie_ysize -1 line. 2 line. 3 line. 1 invalid area aie_yst line aie_ysize camcki (*1) y0 cb0 y1 cr0 y2 cb1 cr1 y3 cr158 y318 y317 cr158 *2 aie_xsize 2 y0 cb0 y1 cr0 y2 cb1 cr1 y3 cr158 y318 cb158 xsize 2 aie varid area *2 yuv_xst camdi0 -camdi7 (*3) camhsi aie_xst 2 y318 cb159 y319 cr159 y318 image area 8.2. ycbcr with synchronizing signals 8-bit input format 8.2.1. horizontal direction synchronization timing fig.7 horizontal direction synchronization timing (note) * yuv_xst, xsize x 2, aie_xst x 2 and aie_xsize2, which are descr ibed in the figures and the notes, are set by the registers. (*1) by changing the setting of the pol register (index address: e1h), the polarities of camcki, ca mvsi and camhsi can be set i ndependently. the figure above shows the timing in the case that the data ar e fetched at the camcki falling edge (ckpol = 1 setting) and the polarity of hsync is low active (hspol = 0 setting). (*2) set camhsi so as not to become 'l' in other sections t han the sync section (camhsi = 'l' section in the figure shown above ). (*3) do not change the frequency of camcki during the operation. (*4) take note of the items described above to input each signal. 8.2.2. vertical direction synchronization timing fig.8 vertical direction synchronization timing (note) * y_size, aie_yst and aie_ysize, which are described in the figures and the notes, are set by the registers. (*1) the figure above shows the timing in the case that the pol arity of vsync is low active (vspol = 0 setting) and also the po larity of hsync is low active (hspol = 0 setting). (*2) take note of the items described above to input each signal.
technical note 9/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. 9. i 2 c interface format the slave address is 42h when i2cdev0 = 0 and 43h when i2cdev0 = 1. when both of the write and read accesses are respectively ex ecuted successively 2 times or more, the sub-address is automatically incremented. sda sdc data transfer 1-7 8 s 1-789 stop condition 91-789p ack ack ack sub address data slave address r/w start condition write sequence read sequence s = start condition a(s) = acknowledge by slave a(s) = not acknowledge by slave p = stop condition a(m) = acknowledge by master a(m) = not acknowledge by master s slave address (42h or 43h) w (0) a(s) sub address a(s) data a(s) data a(s) data a(s)/ a(s) a(m)/ a(m) p p s slave address (42h or 43h) a(s) sub address a(s) s slave address (42h or 43h) w (0) r (1) a(m) data a(s) data fig.9 i 2 c interface format timing chart 1. data input interface timing camvsi camhsi camdi0 -camdi7 camcki (ckpol-?0?) camcki (ckpol-?1?) t ds t dh fig.10 data input interface timing symbol descriptions min typ max unit t ds setup time to camcki rising / falling edge 8 - - ns t dh hold time to camcki rising / falling edge 8 - - ns
technical note 10/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. 2. data output interface timing camvso camdo[7:0] camhso camcko t pclk t ocd t ocd t odd fig.11 data output interface timing symbol descriptions min typ max unit t pclk clock cycle 27.7 - - ns d pclk clock duty 40 50 60 % t odd camdo is defined from camcko - - 5 ns t ocd camvso and camhso are defined from camcko - - 5 ns 3. i 2 c interface timing t low sda sdc t hd;sta t hd;dat t high t su;da t t su;sta t hd;st t su;sto t buf fig.12 i 2 c interface timing application example sdc camhsi camvsi camcki image processing i c camdi[7:0] sda camera module BU1574GUW camdo[7:0] ca mhso ca mvso ca mcko camdo[7:0] c amhso camvso camcko camdoi[7:0] camhsi camvsi camcki fig.13 application example symbol descriptions min typ max unit f scl sdc clock frequency 0 - 400 khz t hd;sta hold time (repeat) "start" condition the first clock pulse is generated after this period 0.6 - - s f low sdc clock "l" period 1.3 - - s t high sdc clock "h" period 0.6 - - s t su;sta repeat "start" condition setup time 0.6 - - s t hd;dat data hold time 0 s t su;dat data setup time 100 - - ns t su;sto "stop" condition setup time 0.6 - - s t buf bus free period between the "stop" condition and "start" condition 1.3 - - s
technical note 11/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. notes for use (1) absolute maximum ratings an excess in the absolute maximum ratings, such as supply volt age, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. if any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) operating conditions these conditions represent a range within which characteristic s can be provided approximately as expected. the electrical characteristics are guaranteed under the conditions of each parameter. (3) reverse connection of power supply connector the reverse connection of power supply connector can break dow n ics. take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the ic?s power supply terminal. (4) power supply line design pcb pattern to provide low impedance for the wiring between the power supply and the gnd lines. in this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressi ng the diffraction of digital noises to the analog block power s upply resulting from impedance common to the wiring patterns. for the gnd line, give consideration to des ign the patterns in a similar manner. furthermore, for all power supply terminals to ics, mount a capacitor between the power supply and the gnd terminal. at the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be us ed present no problem including the occurrence of capacity dr opout at a low temperature, t hus determining the constant. (5) gnd voltage make setting of the potential of the gnd terminal so that it will be mainta ined at the minimum in any operating state. furthermore, check to be sure no terminals are at a potential lo wer than the gnd voltage including an actual electric transient . (6) short circuit between terminals and erroneous mounting in order to mount ics on a set pcb, pay thorough attention to t he direction and offset of the ics. erroneous mounting can break down the ics. furthermore, if a short circuit occurs due to foreign matters enteri ng between terminals or between the terminal and the power supply or the gnd te rminal, the ics can break down. (7) operation in strong electromagnetic field be noted that using ics in the strong elec tromagnetic field can malfunction them. (8) inspection with set pcb on the inspection with the set pcb, if a capacitor is connecte d to a low-impedance ic terminal, the ic can suffer stress. therefore, be sure to discharge from t he set pcb by each process. furthermore, in order to mount or dismount the set pcb to/from the jig for the inspection process, be sure to turn o ff the power supply and then mount the set pcb to the jig. after t he completion of the inspection, be sure to turn off the power supply and then dismount it from the jig. in addition, for protecti on against static electricity, establish a ground for the assemb ly process and pay thorough attention to the transportation and th e storage of the set pcb. (9) input terminals in terms of the construction of ic, parasi tic elements are inevitably formed in relati on to potential. the operation of the par asitic element can cause interference with circui t operation, thus resulting in a malfun ction and then breakdown of the input terminal . therefore, pay thorough attention not to handle the input terminals, such as to appl y to the input terminals a voltage lower th an the gnd respectively, so that any parasitic element will oper ate. furthermore, do not apply a voltage to the input terminals wh en no power supply voltage is applied to the ic. in addition, even if the power supply voltage is applied, apply to the input term inals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) ground wiring pattern if small-signal gnd and large-current gnd are provided, it will be recommended to separate the large-current gnd pattern from the small-signal gnd pattern and establish a single ground at the reference point of the set pcb so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal gnd. pay attention not to cause fluctuations in the g nd wiring pattern of external parts as well. (11) external capacitor in order to use a ceramic capacitor as t he external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to dc bias and changes in the capacitance due to temperature, etc.
technical note 12/12 BU1574GUW www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. ordering part number b u 1 5 7 4 g u w - e 2 rohm model name product number package type guw: vbga063w050 taping model name e2: embossed reel tape package specification (unit : mm) vbga063w050 f 8 3 c 0.9max d g 0.5 a e 0.5 762 h 51 0.10 4 b 5.0 0.1 5.0 0.1 0.75 0.1 0.75 0.1 p=0.5 7 p=0.5 7 s m abs 0.05 63- 0.295 0.05 0.08 s a b 1pin mark ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape (with dry pack) tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin
r0039 a www.rohm.com ? 2009 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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